Block and booth floating point number multiplication algorithms in FPGA's generalized learning vector quantization implementation

Yulistiyan Wardhana, H. S. Putra, S. I. Sakinah, Wisnu Jatmiko, Petrus Mursanto, Prahesa Kusuma Setia

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

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